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专利概况
专利名称 Basic cell architecture for mask programmable gate array with 3 or more size transistors
申请号 US07717140 申请日
公开(公告)号 US5289021A 公开(公告)日
申请(专利权)人 SIARC 发明人 EL GAMAL; ABBAS
专利来源 国家知识产权局 转化方式
摘要

A highly efficient CMOS cell structure for use in a metal mask programmable gate array, such as a sea-of-gates type gate array, is disclosed herein. In a basic cell, in accordance with one embodiment of the invention, three or more sizes of N-channel transistors and three or more sizes of P-channel transistors are used. The larger size transistors are incorporated in a drive section of a cell, while the smaller size transistors are incorporated in each compute section of a cell. The particular transistors in the compute and drive sections and the arrangements of the compute and drive sections provide a highly efficient use of silicon real estate while enabling the formation of a wide variety of macrocells to be formed.

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